From 0288997cc3eea0b252b748f8803171a0a4e986fc Mon Sep 17 00:00:00 2001
From: Daniel Friesel <derf@finalrewind.org>
Date: Sun, 19 Sep 2021 18:42:25 +0200
Subject: [PATCH] lora32u4ii: add spi driver

---
 include/arch/lora32u4ii/driver/spi.h | 15 +++++++++++
 src/arch/lora32u4ii/Kconfig          |  4 +++
 src/arch/lora32u4ii/Makefile.inc     |  8 ++++++
 src/arch/lora32u4ii/driver/spi.cc    | 39 ++++++++++++++++++++++++++++
 4 files changed, 66 insertions(+)
 create mode 100644 include/arch/lora32u4ii/driver/spi.h
 create mode 100644 src/arch/lora32u4ii/driver/spi.cc

diff --git a/include/arch/lora32u4ii/driver/spi.h b/include/arch/lora32u4ii/driver/spi.h
new file mode 100644
index 0000000..6377fe9
--- /dev/null
+++ b/include/arch/lora32u4ii/driver/spi.h
@@ -0,0 +1,15 @@
+#pragma once
+
+class SPI {
+	private:
+		SPI(const SPI &copy);
+
+	public:
+		SPI () {}
+		signed char setup();
+		signed char xmit(
+				unsigned char tx_len, unsigned char *tx_buf,
+				unsigned char rx_len, unsigned char *rx_buf);
+};
+
+extern SPI spi;
diff --git a/src/arch/lora32u4ii/Kconfig b/src/arch/lora32u4ii/Kconfig
index eb85780..8a59fa6 100644
--- a/src/arch/lora32u4ii/Kconfig
+++ b/src/arch/lora32u4ii/Kconfig
@@ -14,6 +14,10 @@ config arch_lora32u4ii_driver_adc
 bool "ADC (Analog-Digital-Converter)"
 select meta_driver_adc
 
+config arch_lora32u4ii_driver_spi
+bool "SPI"
+select meta_driver_spi
+
 config arch_lora32u4ii_driver_uptime
 bool "Uptime Counter"
 select meta_driver_uptime
diff --git a/src/arch/lora32u4ii/Makefile.inc b/src/arch/lora32u4ii/Makefile.inc
index 3aeefa8..f14bc8c 100644
--- a/src/arch/lora32u4ii/Makefile.inc
+++ b/src/arch/lora32u4ii/Makefile.inc
@@ -48,12 +48,20 @@ ifneq ($(findstring adc,${arch_drivers}), )
 	CONFIG_arch_lora32u4ii_driver_adc = y
 endif
 
+ifneq ($(findstring spi,${arch_drivers}), )
+	CONFIG_arch_lora32u4ii_driver_spi = y
+endif
+
 # Kconfig driver selection
 
 ifdef CONFIG_arch_lora32u4ii_driver_adc
 	CXX_TARGETS += src/arch/lora32u4ii/driver/adc.cc
 endif
 
+ifdef CONFIG_arch_lora32u4ii_driver_spi
+	CXX_TARGETS += src/arch/lora32u4ii/driver/spi.cc
+endif
+
 ifdef CONFIG_arch_lora32u4ii_driver_uptime
 	COMMON_FLAGS += -DTIMER_S
 	CXX_TARGETS += src/arch/lora32u4ii/driver/uptime.cc
diff --git a/src/arch/lora32u4ii/driver/spi.cc b/src/arch/lora32u4ii/driver/spi.cc
new file mode 100644
index 0000000..f7cc29e
--- /dev/null
+++ b/src/arch/lora32u4ii/driver/spi.cc
@@ -0,0 +1,39 @@
+#include "driver/spi.h"
+#include "driver/gpio.h"
+#include "arch.h"
+#include <avr/io.h>
+
+signed char SPI::setup()
+{
+	// configure SS as output to avoid unintened switches to slave mode
+	gpio.output(GPIO::pb0, 0);
+	// MISO is automatically configured as input
+	// Configure SCK and MOSI as output
+	DDRB |= _BV(PB2) | _BV(PB1);
+	// up to 2 MHz SPI clock
+	SPCR = _BV(SPE) | _BV(MSTR) | _BV(SPR0);
+}
+
+signed char SPI::xmit(
+		unsigned char tx_len, unsigned char *tx_buf,
+		unsigned char rx_len, unsigned char *rx_buf)
+{
+	unsigned char i = 0;
+
+	while ((i < tx_len) || (i < rx_len)) {
+		if (i < tx_len) {
+			SPDR = tx_buf[i];
+		} else {
+			SPDR = 0;
+		}
+		arch.delay_ms(1);
+		while (!(SPSR & _BV(SPIF))) ;
+		if (i < rx_len) {
+			rx_buf[i] = SPDR;
+		}
+		i++;
+	}
+	return 0;
+}
+
+SPI spi;
-- 
GitLab