Loading include/arch/stm32f446re-nucleo/driver/uptime.h 0 → 100644 +27 −0 Original line number Diff line number Diff line #ifndef UPTIME_H #define UPTIME_H #include <stdint.h> class Uptime { private: Uptime(const Uptime ©); #ifdef TIMER_S uint32_t seconds; #endif public: #ifdef TIMER_S Uptime () : seconds(0) {} #else Uptime () {} #endif #ifdef TIMER_S inline uint32_t get_s() { return seconds; } inline void tick_s() { seconds++; } #endif }; extern Uptime uptime; #endif src/arch/stm32f446re-nucleo/Makefile.inc +1 −1 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ endif CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/gpio.cc CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdout.cc #CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc ifneq ($(findstring stdin,${arch_drivers}), ) CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdin.cc Loading src/arch/stm32f446re-nucleo/arch.cc +49 −2 Original line number Diff line number Diff line #include <libopencm3/cm3/nvic.h> #include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/gpio.h> #include <libopencm3/stm32/timer.h> #include "arch.h" #ifdef __acweaving Loading @@ -6,6 +10,27 @@ void Arch::setup(void) { // NUCLEO-F443RE uses 8MHz STLINK clock as input rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]); #ifdef WITH_LOOP rcc_periph_clock_enable(RCC_TIM2); nvic_enable_irq(NVIC_TIM2_IRQ); rcc_periph_reset_pulse(RST_TIM2); timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // 10 kHz timer frequency timer_set_prescaler(TIM2, ((rcc_apb1_frequency * 2) / 10000)); timer_disable_preload(TIM2); // ? timer_continuous_mode(TIM2); // ? timer_set_period(TIM2, 10000); timer_enable_counter(TIM2); timer_enable_irq(TIM2, TIM_DIER_UIE); #endif } #ifdef WITH_WAKEUP Loading Loading @@ -37,9 +62,13 @@ void Arch::delay_ms(unsigned int const ms) void Arch::idle_loop(void) { while (1) { delay_ms(1000); pwr_set_standby_mode(); __asm__("wfi"); #ifdef WITH_LOOP if (run_loop) { loop(); run_loop = 0; } #endif } } Loading @@ -52,3 +81,21 @@ void Arch::idle(void) } Arch arch; #if defined(WITH_LOOP) || defined(TIMER_S) #include "driver/uptime.h" void tim2_isr(void) { if (timer_get_flag(TIM2, TIM_SR_UIF)) { timer_clear_flag(TIM2, TIM_SR_UIF); #ifdef WITH_LOOP run_loop = 1; #endif #ifdef TIMER_S uptime.tick_s(); #endif } } #endif src/arch/stm32f446re-nucleo/driver/uptime.cc 0 → 100644 +3 −0 Original line number Diff line number Diff line #include "driver/uptime.h" Uptime uptime; Loading
include/arch/stm32f446re-nucleo/driver/uptime.h 0 → 100644 +27 −0 Original line number Diff line number Diff line #ifndef UPTIME_H #define UPTIME_H #include <stdint.h> class Uptime { private: Uptime(const Uptime ©); #ifdef TIMER_S uint32_t seconds; #endif public: #ifdef TIMER_S Uptime () : seconds(0) {} #else Uptime () {} #endif #ifdef TIMER_S inline uint32_t get_s() { return seconds; } inline void tick_s() { seconds++; } #endif }; extern Uptime uptime; #endif
src/arch/stm32f446re-nucleo/Makefile.inc +1 −1 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ endif CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/gpio.cc CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdout.cc #CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc ifneq ($(findstring stdin,${arch_drivers}), ) CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdin.cc Loading
src/arch/stm32f446re-nucleo/arch.cc +49 −2 Original line number Diff line number Diff line #include <libopencm3/cm3/nvic.h> #include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/gpio.h> #include <libopencm3/stm32/timer.h> #include "arch.h" #ifdef __acweaving Loading @@ -6,6 +10,27 @@ void Arch::setup(void) { // NUCLEO-F443RE uses 8MHz STLINK clock as input rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]); #ifdef WITH_LOOP rcc_periph_clock_enable(RCC_TIM2); nvic_enable_irq(NVIC_TIM2_IRQ); rcc_periph_reset_pulse(RST_TIM2); timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // 10 kHz timer frequency timer_set_prescaler(TIM2, ((rcc_apb1_frequency * 2) / 10000)); timer_disable_preload(TIM2); // ? timer_continuous_mode(TIM2); // ? timer_set_period(TIM2, 10000); timer_enable_counter(TIM2); timer_enable_irq(TIM2, TIM_DIER_UIE); #endif } #ifdef WITH_WAKEUP Loading Loading @@ -37,9 +62,13 @@ void Arch::delay_ms(unsigned int const ms) void Arch::idle_loop(void) { while (1) { delay_ms(1000); pwr_set_standby_mode(); __asm__("wfi"); #ifdef WITH_LOOP if (run_loop) { loop(); run_loop = 0; } #endif } } Loading @@ -52,3 +81,21 @@ void Arch::idle(void) } Arch arch; #if defined(WITH_LOOP) || defined(TIMER_S) #include "driver/uptime.h" void tim2_isr(void) { if (timer_get_flag(TIM2, TIM_SR_UIF)) { timer_clear_flag(TIM2, TIM_SR_UIF); #ifdef WITH_LOOP run_loop = 1; #endif #ifdef TIMER_S uptime.tick_s(); #endif } } #endif
src/arch/stm32f446re-nucleo/driver/uptime.cc 0 → 100644 +3 −0 Original line number Diff line number Diff line #include "driver/uptime.h" Uptime uptime;