Loading src/arch/msp430fr5994lp/arch.cc +13 −1 Original line number Diff line number Diff line Loading @@ -37,6 +37,8 @@ void Arch::setup(void) // 8MHz DCO CSCTL0_H = CSKEY >> 8; CSCTL1 = DCOFSEL_0; #elif F_CPU == 32768UL CSCTL0_H = CSKEY >> 8; #else #error Unsupported F_CPU #endif Loading @@ -50,7 +52,7 @@ void Arch::setup(void) CSCTL0_H = 0; #ifdef WITH_LOOP #if defined(WITH_LOOP) || F_CPU == 72368UL // enable LXFT for RTC CSCTL0_H = CSKEY >> 8; CSCTL4 &= ~LFXTOFF; Loading Loading @@ -82,6 +84,12 @@ void Arch::setup(void) TA0CTL |= TACLR; #endif /* TIMER_US */ #if F_CPU == 32768UL CSCTL0_H = CSKEY >> 8; CSCTL2 = SELA__LFXTCLK | SELS__LFXTCLK | SELM__LFXTCLK; CSCTL0_H = 0; #endif #if defined(WITH_LOOP) || defined(TIMER_S) // 1s per wakeup for loop. Independent of SMCLK/F_CPU TA1CTL = TASSEL__ACLK | ID__8 | MC__UP; Loading Loading @@ -153,6 +161,10 @@ void Arch::sleep_ms(unsigned int const ms) TA3CTL = TASSEL__SMCLK | ID__8; // /8 TA3EX0 = 0; // /1 -> /8 (125 kHz) TA3CCR0 = ms * 125; #elif F_CPU == 32768UL TA3CTL = TASSEL__SMCLK | ID__8; // /8 TA3EX0 = 0; // /1 -> /8 (4.096 kHz) TA3CCR0 = ms * 4; #else #error Unsupported F_CPU #endif /* F_CPU */ Loading src/arch/msp430fr5994lp/driver/stdout.cc +6 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,12 @@ void StandardOutput::setup() UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x5500; UCA0BR0 = 8; #elif F_CPU == 32768UL // Limited to 9600 Baud // 32768 / 9600 == 3.413333 -> UCOS16 = 0, UCBR0 = 3, UCBRF0 = 0, UCBRS0 = 0x92 ("0.4003") UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x9200; UCA0BR0 = 3; #else #error Unsupported F_CPU #endif Loading Loading
src/arch/msp430fr5994lp/arch.cc +13 −1 Original line number Diff line number Diff line Loading @@ -37,6 +37,8 @@ void Arch::setup(void) // 8MHz DCO CSCTL0_H = CSKEY >> 8; CSCTL1 = DCOFSEL_0; #elif F_CPU == 32768UL CSCTL0_H = CSKEY >> 8; #else #error Unsupported F_CPU #endif Loading @@ -50,7 +52,7 @@ void Arch::setup(void) CSCTL0_H = 0; #ifdef WITH_LOOP #if defined(WITH_LOOP) || F_CPU == 72368UL // enable LXFT for RTC CSCTL0_H = CSKEY >> 8; CSCTL4 &= ~LFXTOFF; Loading Loading @@ -82,6 +84,12 @@ void Arch::setup(void) TA0CTL |= TACLR; #endif /* TIMER_US */ #if F_CPU == 32768UL CSCTL0_H = CSKEY >> 8; CSCTL2 = SELA__LFXTCLK | SELS__LFXTCLK | SELM__LFXTCLK; CSCTL0_H = 0; #endif #if defined(WITH_LOOP) || defined(TIMER_S) // 1s per wakeup for loop. Independent of SMCLK/F_CPU TA1CTL = TASSEL__ACLK | ID__8 | MC__UP; Loading Loading @@ -153,6 +161,10 @@ void Arch::sleep_ms(unsigned int const ms) TA3CTL = TASSEL__SMCLK | ID__8; // /8 TA3EX0 = 0; // /1 -> /8 (125 kHz) TA3CCR0 = ms * 125; #elif F_CPU == 32768UL TA3CTL = TASSEL__SMCLK | ID__8; // /8 TA3EX0 = 0; // /1 -> /8 (4.096 kHz) TA3CCR0 = ms * 4; #else #error Unsupported F_CPU #endif /* F_CPU */ Loading
src/arch/msp430fr5994lp/driver/stdout.cc +6 −0 Original line number Diff line number Diff line Loading @@ -32,6 +32,12 @@ void StandardOutput::setup() UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x5500; UCA0BR0 = 8; #elif F_CPU == 32768UL // Limited to 9600 Baud // 32768 / 9600 == 3.413333 -> UCOS16 = 0, UCBR0 = 3, UCBRF0 = 0, UCBRS0 = 0x92 ("0.4003") UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x9200; UCA0BR0 = 3; #else #error Unsupported F_CPU #endif Loading