Commit 531e1e0e authored by Daniel Friesel's avatar Daniel Friesel
Browse files

stm32f446re: configurable clock speed

parent 7b962b22
Loading
Loading
Loading
Loading
+6 −0
Original line number Diff line number Diff line
@@ -55,6 +55,12 @@ ifneq ($(findstring counter,${arch_drivers}), )
	CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/counter.cc
endif

ifneq (${cpu_freq}, )
	COMMON_FLAGS += -DF_CPU=${cpu_freq}UL
else
	COMMON_FLAGS += -DF_CPU=168000000UL
endif


OBJECTS = ${CXX_TARGETS:.cc=.o} ${C_TARGETS:.c=.o} ${ASM_TARGETS:.S=.o}

+10 −1
Original line number Diff line number Diff line
@@ -10,8 +10,17 @@

void Arch::setup(void)
{
	// NUCLEO-F443RE uses 8MHz STLINK clock as input
	// NUCLEO-F443RE uses 8MHz STLINK clock (MCO from STLINK MCU) as input
	// (it is connected to OSC_IN -> HSE OSC)
#if F_CPU == 180000000UL
	rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_180MHZ]);
#elif F_CPU == 168000000UL
	rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
#elif F_CPU == 84000000UL
	rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
#else
#error Unsupported F_CPU
#endif

	// counter
	rcc_periph_clock_enable(RCC_TIM2);