Commit 960d7042 authored by Daniel Friesel's avatar Daniel Friesel
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msp430fr5994lp sleep_ms: handle ms == 0

parent d655a5eb
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+3 −0
Original line number Diff line number Diff line
@@ -131,6 +131,9 @@ volatile bool sleep_done = false;
// max delay: 524 ms @  8 MHz
void Arch::sleep_ms(unsigned int const ms)
{
	if (ms == 0) {
		return;
	}
	sleep_done = false;
#if F_CPU == 16000000UL
	TA3CTL = TASSEL__SMCLK | ID__8; // /8