Loading README.md +2 −1 Original line number Diff line number Diff line Loading @@ -55,7 +55,7 @@ features; the remainder of this README covers details. | MSP430FR5994 | 16 MHz | 48 (256) KiB FRAM | 4 (8) KiB SRAM | I²C, SPI, UART, DMX, ADC | | RM46L852 (Cortex-R4F) | 160 MHz | 1.25 MiB Flash | 192 KiB SRAM | | | STM32F446RE (Cortex-M4) | 168 MHz | 512 KiB Flash | 128 KiB SRAM | I²C | | STM32F746ZG (Cortex-M7) | 216 MHz | 1 MiB Flash | 320 KiB SRAM | | | STM32F746ZG (Cortex-M7) | 216 MHz | 1 MiB Flash | 320 KiB SRAM | I²C | | POSIX | – | – | – | I²C | ## Supported Architectures Loading Loading @@ -140,6 +140,7 @@ Preliminary support, timers may be incorrect. Peripheral communication: * UART output on USART3 * I²C on I2C1 muxed to PB8 / PB9 ### POSIX Loading Loading
README.md +2 −1 Original line number Diff line number Diff line Loading @@ -55,7 +55,7 @@ features; the remainder of this README covers details. | MSP430FR5994 | 16 MHz | 48 (256) KiB FRAM | 4 (8) KiB SRAM | I²C, SPI, UART, DMX, ADC | | RM46L852 (Cortex-R4F) | 160 MHz | 1.25 MiB Flash | 192 KiB SRAM | | | STM32F446RE (Cortex-M4) | 168 MHz | 512 KiB Flash | 128 KiB SRAM | I²C | | STM32F746ZG (Cortex-M7) | 216 MHz | 1 MiB Flash | 320 KiB SRAM | | | STM32F746ZG (Cortex-M7) | 216 MHz | 1 MiB Flash | 320 KiB SRAM | I²C | | POSIX | – | – | – | I²C | ## Supported Architectures Loading Loading @@ -140,6 +140,7 @@ Preliminary support, timers may be incorrect. Peripheral communication: * UART output on USART3 * I²C on I2C1 muxed to PB8 / PB9 ### POSIX Loading
